Older Indi Files

Here are older files to prevent clogging of the front page, and any directory structure limitations. Not all files exsist on all servers. To this end a server mirror-ish list is given now, but some mirrors may not be up to date.

• indi.hpsdr.com
• indi.microfpga.com

Here are the older links to files, as the project has now gone on to using vhdl or verilog.

Please Note: none of the below designs have pin placement completed.

• Indi16.3.3.zip : Altered memory access time requirements. First cycle is address presentation, second cycle is data hold cycle. 60MHz, 12MIPS, 332 LEs. (actually slower as memory access time has to be added to cycle time). Future versions will have an 8 bit data bus with optimizations such as a a more complex adder for higher speed. Bus cycles will be MSB load first and LSB save first.
• Indi16.3.2.zip : Rated 60MHz at 12MIPS. 330 LEs. Fixed R/W and WR/OE to a 41 pin design. With two power pins and a CLKOUT pin this makes a 44 pin QFP package custom silicon possible, so I must specify the pin out.. Processor development halted while concentrating on FORTH compilier. Will do 64MHz. When targetted for Cyclone II EP2C5T144C8 234 LEs (5%) 74MHz. This is the slowest speed grade Cyclone II.
• Indi16.3.1.zip : Same 12 MIPS. Fixed a number of race-logical-enable errors and refined. Use this one at 329 LEs and may even work. I have to see just how much this would be in custom silicon. Needs a test.
• Indi16.3.0.zip : Moved to MAX II EPM1270T144C5 to allow more expansion space. Arround 350 LEs with a redesigned sequencing unit. Correction of logical error. 64MHz using two cycle model for 12+ MIPS. New 40 pin TEST16 circuit. Will fit in EPM570T100C5 but intend IO devices too.
• Indi16.0.0.zip : MAX II development kit pin planner assignments ONLY. Could save you some time in your own projects, but is not used in any version upto indi16.3.3 as the development board was not available for programming.

ALL Quartus II Design Files Directory : All develompent files of 16n bit embedded fpga microprocessor Indi16 (BSD Licence OFSIP) which may include some old ones.