-- indi16 vhdl
-- Board Port Declarations (Top Level Objact)
-- (C)2007 K Ring Technologies Semiconductor
-- designed for 66MHz operation

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;

ENTITY board IS
	PORT
	(
		CLK			: IN	STD_LOGIC;
		
		A			: OUT	STD_LOGIC_VECTOR(16 DOWNTO 0);
		D			: INOUT	STD_LOGIC_VECTOR(7 DOWNTO 0);
		CEN			: OUT	STD_LOGIC;
		OEN			: OUT	STD_LOGIC;
		WEN			: OUT	STD_LOGIC;
		V_MEM_ENA	: OUT	STD_LOGIC;
		
		S			: IN	STD_LOGIC_VECTOR(4 DOWNTO 1);
		LED			: OUT	STD_LOGIC_VECTOR(4 DOWNTO 1);
		
		LCD_DB		: INOUT	STD_LOGIC_VECTOR(7 DOWNTO 0);
		LCD_E		: OUT	STD_LOGIC;
		LCD_RS		: OUT	STD_LOGIC;
		LCD_RW		: OUT	STD_LOGIC;
		V_LCD_ENA	: OUT	STD_LOGIC;
		
		USB_D		: INOUT	STD_LOGIC_VECTOR(7 DOWNTO 0);
		USB_RXFN	: IN	STD_LOGIC;
		USB_TXEN	: IN	STD_LOGIC;
		USB_WR		: OUT	STD_LOGIC;
		USB_RDN		: OUT	STD_LOGIC;
		USB_PWREN	: OUT	STD_LOGIC;
		USB_WU		: OUT	STD_LOGIC;
		-- setup to simulate EEPROM on MAXII
		USB_SK		: IN	STD_LOGIC;
		USB_CS		: IN	STD_LOGIC;
		USB_EEDATA	: INOUT	STD_LOGIC;
		
		SC			: INOUT	STD_LOGIC_VECTOR(40 DOWNTO 0);
		SC_CARDSELN	: INOUT	STD_LOGIC;
		SC_CLK1		: INOUT	STD_LOGIC;
		SC_CLK2		: INOUT	STD_LOGIC;
		SC_OSC		: INOUT	STD_LOGIC;
		SC_RESETN	: INOUT	STD_LOGIC;
		V_SC_ENA	: OUT	STD_LOGIC;
		
		--PCI_AD		: INOUT	STD_LOGIC_VECTOR(31 DOWNTO 0);
		--PCI_CBEN	: ?	STD_LOGIC_VECTOR(3 DOWNTO 0);
		--PCI_CLK
		--PCI_DEVSELN
		--PCI_ENABLEN
		--PCI_FRAMEN
		--PCI_GNTN
		--PCI_IDSEL
		--PCI_INTAN
		--PCI_IRDYN
		--PCI_LOCKN
		--PCI_PAR
		--PCI_PERRN
		--PCI_REQN
		--PCI_RSTN
		--PCI_SERRN
		--PCI_STOPN
		--PCI_TRDYN
		
		--ADC_CLK
		--ADC_CS
		--ADC_DIN
		--ADC_DOUT
		--ADC_SHDN
		--ADC_SSTRB
		--GSEL_INT	: OUT	STD_LOGIC;
		--GSEL_IO		: OUT	STD_LOGIC
		IO_V_ADC	: OUT	STD_LOGIC;
		
		TEMP_CS		: OUT	STD_LOGIC;
		TEMP_SCK	: OUT	STD_LOGIC;
		TEMP_SDO	: IN	STD_LOGIC
	);
END board;

ARCHITECTURE a OF board IS

BEGIN

END a;